Design & Verification Engineer

Job Description:

We are looking for an experienced Design & Verification Engineer to join our team remotely across Europe. The ideal candidate will have a strong background in VHDL-based digital design and VLSI verification, with hands-on experience using Cadence and Synopsys tools. This role offers the opportunity to work on complex, high-performance chip designs in a collaborative and innovative environment.

Key Responsibilities:

• Design and implement digital circuits using VHDL.
• Perform functional verification and validation of VLSI designs.
• Develop and execute testbenches, simulation scripts, and verification plans.
• Collaborate with design engineers to identify and resolve design issues.
• Use Cadence and Synopsys tools for synthesis, simulation, and debugging.
• Maintain detailed documentation of design and verification processes.

Required Skills & Qualifications:

• Minimum 5 years of experience in digital design and verification.
• Strong proficiency in VHDL and VLSI design methodologies.
• Hands-on experience with Cadence and Synopsys tools.
• Solid understanding of digital logic, timing analysis, and chip verification flows.
• Excellent problem-solving and analytical skills.
• Ability to work independently in a remote setup across Europe.
• Good communication and documentation skills in English.

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